1. Technical Field
The present invention relates to a liquid crystal display technique, and more particularly, to a source driver capable of providing a variety of signal polarity converting patterns.
2. Description of the Prior Art
Liquid crystal display (LCD) has characteristics such as a planar screen, a slim body, and low power consumption, so it is favored in the market and becomes a mainstream display technique. The operation principle of the LCD is mainly to apply an external electric field to two poles of a liquid crystal (LC) cell. This causes the LC cell to be rotated to different degrees, thereby controlling amount of light transmission. Finally, since different light transmission amounts may generate different grey-level effects, the image is therefore displayed by mixing different primary colors of light. However, if an electric field of a specific direction is continuously imposed upon the LC cell for a long time, it will damage the structure of the LC cell. So, in an actual implementation of driving the LC cell, alternatively switching between different polarities of the driving voltage during a certain period is utilized, which is also called polarity inversion. In order to achieve the driving effect of the polarity inversion, the circuit structure of the source driver which is utilized for generating the driving voltage is specially designed. Please refer to the following description for details of the circuit structure of the source driver with polarity inversion functionality.
Please refer to FIG. 1, which is a simplified function block diagram of a conventional source driver. As shown in the figure, the source driver 10 includes shift registers (SRs) 11_1-11_2, primary latching circuits (PRI_LATCHs) 12_1-12_2, secondary latching circuits (SEC_LATCHs) 13_1-13_2, level shifting circuits (LS_CKTs) 14_1-14_2, digital-to-analog converting circuits (DAC_CKTs) 15_1-15_2, output buffer circuits (OUT_BUFs) 16_1-16_2, and output circuits (OUT_CKTs) 17_1-17_2. A combination of the shift register (SR) 11_1, the primary latching circuit (PRI_LATCH) 12_1, the secondary latching circuit (SEC_LATCH) 13_1, the level shifting circuit (LS_CKT) 14_1, the digital-to-analog converting circuit (DAC_CKT) 15_1, the output buffer circuit (OUT_BUF) 16_1 and the output circuit (OUT_CKT) 17_1 forms a so-called signal channel 10A. The source driving signal which is generated via the signal channel will be transmitted to a pixel via a signal line. Similarly, a combination of other circuits forms another signal channel 10B. As to each signal channel, the digital-to-analog converting circuit (DAC_CKT) 15_1 or 15_2 may be controlled by a polarity control signal POL to change polarities of output signals of the respective signal channels. For example, if an analog voltage generated from the digital-to-analog converting circuit (DAC_CKT) by processing the digital input pixel data is 20V, the digital-to-analog converting circuit (DAC_CKT) 15_1/15_2 refers to the polarity control signal POL to output +20V or −20V to the output circuit (OUT_CKT) 17_1/17_2 for driving the pixel. However, if it is desired to support a positive voltage output as well as a negative voltage output, the circuit structure of the digital-to-analog converting circuit (DAC_CKT) 15_1/15-2 is more complicated than that of the digital-to-analog converting circuits (DAC_CKTs) which only output voltages of a single polarity. As a result, the whole circuit area of the source driver 10 is increased accordingly.
Therefore, there is an improved structure of a source driver according to the prior art. Please refer to FIG. 2, which is a function block diagram of an improved source driver. As shown in the figure, the source driver 20 includes shift registers (SRs) 21_1-21_2, primary latching circuits (PRI_LATCHs) 22_1-22_2, secondary latching circuits (SEC_LATCHs) 23_1-23_2, level shifting circuits (LS_CKTs) 24_1-24_2, digital-to-analog converting circuits (DAC_CKTs) 25_1-25_2, output buffer circuits (OUT_BUFs) 26_1-26_2, and output circuits (OUT_CKTs) 27_1-27_2. Each of the digital-to-analog converting circuits (DAC_CKTs) 25_1-25_2 in the signal channels 20A and 20B may only output voltages of a single polarity (i.e., either positive voltages or negative voltages). With the assistance of the switching devices 2A and 2B, the same objective of making the source driver 20 alternately change the signal polarities of the source driving signals is achieved. However, this structure only switches signal polarities of driving signals output by adjacent signal channels 20A and 20B. Therefore, the signal polarity inversion patterns finally achieved are limited. Besides, the improved source driver 20 has poorer variety of signal polarity inversion patterns than the traditional source driver 10. It is because the source driver 10 is capable of inverting polarities of signals generated from signal channels freely; however, the source driver 20 has to control the switching of signal routes of adjacent signal channels for achieving the signal polarity inversion effect. Therefore, the source driver 20 may only output a driving signal sequence with a regular polarity pattern of “positive, negative, positive, negative, . . . ” or “negative, positive, negative, positive, . . . ”, and fails to provide a driving signal sequence with any further polarity pattern. Briefly summarized, the conventional source driver structure still has room for improvement.